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STATS ChipPAC Sets Up R&D Facility in Singapore
Source: Singapore Investment
 
Altro FlooringSTATS ChipPAC Ltd, a leading independent semiconductor test and advanced packaging service provider, has established a new R&D facility in Singapore. It will be dedicated to developing next generation technology, TSV (through silicon via) and microbump bonding for three dimensional (3D) die, silicon substrate-based packaging solutions, and embedded active die technology.


Stretched over 10,000 sq ft, the facility will house class 10, 100 and 10K cleanroom spaces, with an additional 9,000 sq ft available for future expansion. The R&D operation will specialize in wafer level processing with an equipment set for photolithography, plasma etching and deep reactive ion etching (DRIE), wafer thinning and wafer bonding. A strong engineering workforce of 40 employees will focus on advanced wafer integration technology.

Says Dr Han Byung Joon, Chief Technology Officer, STATS ChipPAC, “STATS ChipPAC has taken a leadership role in driving integration technology and flexibility in packaging architecture and we believe the next important step is to build on our 3D wafer level integration technology. The new facility fulfils an important role in the company’s global R&D strategy and will augment our current worldwide R&D operations focusing on advanced packaging solutions.”